8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
256-byte RAM data memory and a 256-byte auxiliary on-chip RAM.
8-input multiplexed 10-bit ADC with window comparator that can generate an interrupt for in or out of range results. Two analog comparators with selectable inputs and reference source.
Two 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output) and a 23-bit system timer that can also be used as a RTC.
Two enhanced UARTs with a fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 kHz byte-wide I²C-bus communication port and SPI communication port.
High-accuracy internal RC oscillator option, with clock doubler option, allows operation without external oscillator components. The RC oscillator option is selectable and fine tunable. Fast switching between the internal RC oscillator and any oscillator source provides optimal support of minimal power active mode with fast switching to maximum performance.
2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).
44-pin and 48-pin packages with 40 and 42 I/O pins minimum while using on-chip oscillator and reset options.
Port 5 has high current sourcing/sinking (20 mA) for all Port 5 pins. All other port pins have high sinking capability (20 mA). A maximum limit is specified for the entire chip.
Watchdog timer with separate on-chip oscillator, requiring no external components. The watchdog prescaler is selectable from eight values.